cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 1/9 MTD55N10Q8 cystek product specification n -channel logic level enhancement mode power mosfet MTD55N10Q8 bv dss 100v i d 4.9a v gs =10v, i d =4.5a 52m v gs =6v, i d =4a 57m r dson(typ) 73m v gs =4.5v, i d =3a features ? low gate charge ? simple drive requirement ? pb-free lead plating package symbol outline ordering information device package shipping MTD55N10Q8-0-t3-g sop-8 (pb-free lead plating and halogen-free package) 2500 pcs / tape & reel sop-8 MTD55N10Q8 pin 1 g gate d drain s source environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 2/9 MTD55N10Q8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 100 gate-source voltage v gs 20 v continuous drain current @v gs =10v, t a =25 c 4.9 continuous drain current @v gs =10v, t a =70 c i d 3.9 pulsed drain current i dm 32 *1 avalanche current i as 4.5 a avalanche energy @ l=10mh, i d =4.5a, v gs =20v, v dd =25v e as 101 repetitive avalanche energy @ l=0.05mh e ar 0.5 *2 mj t a =25 3.1 total power dissipation *3 t a =70 p d 2 w operating junction and storage temperature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 20 c/w thermal resistance, junction-to-ambient, max r th,j-a 40 *3 c/w note : 1. pulse width limited by maximum junction temperature. 2. duty cycle 1%. 3. surface mounted on 1 in2 copper pad of fr-4 board, t 10s ; 125 c/w when mounted on minimum copper pad. the value in any given application depends on the user?s specific board design. characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v v gs =0, i d =250 a v gs(th) 1.5 2.3 3 v v ds =v gs , i d =250 a i gss - - 100 na v gs = 20, v ds =0 - - 1 v ds =80v, v gs =0 i dss - - 25 a v ds =80v, v gs =0, t j =125 c - 52 70 v gs =10v, i d =4.5a - 57 80 v gs =6v, i d =4a r ds(on) *1 - 73 90 m v gs =4.5v, i d =3a g fs *1 - 7 - s v ds =5v, i d =3a dynamic qg *1, 2 - 12 17 qgs *1, 2 - 1.8 2.4 qgd *1, 2 - 5.7 7.5 nc i d =4.5a, v ds =80v, v gs =10v t d(on) *1, 2 - 5 10 tr *1, 2 - 4 8 t d(off) *1, 2 - 16 32 t f *1, 2 - 9 18 ns v ds =50v, i d =4.5a, v gs =10v, r g =6
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 3/9 MTD55N10Q8 cystek product specification ciss - 470 610 coss - 78 105 crss - 31 40 pf v gs =0v, v ds =25v, f=1mhz source-drain diode i s *1 - - 3.5 i sm *3 - - 14 a v sd *1 - 0.72 1 v i s =1a, v gs =0v trr - 30 - ns qrr - 90 - nc i f =3a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 4/9 MTD55N10Q8 cystek product specification typical characteristics typical output characteristics 0 4 8 12 16 20 24 28 32 024681 0 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v 10v,9v,8v,7v,6v v ds , drain-source voltage(v) i d , drain current (a) v gs =5v v gs =4v v gs =3v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3.5v v gs =4.5v v gs =10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =4.5a r ds( on) @tj=25c : 53 m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =4.5a
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 5/9 MTD55N10Q8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =5v gate charge characteristics 0 2 4 6 8 10 048121 qg, total gate charge(nc) v gs , gate-source voltage(v) 6 i d =4.5a v ds =48v v ds =30v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =10v, ja =125c/w single pulse dc 100ms r dson limited 1s 100 s 1ms 10ms maximum drain current vs junction temperature 0 1 2 3 4 5 6 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25, v gs =10v, r ja =40c/w
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 6/9 MTD55N10Q8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 4 8 12 16 20 24 28 32 0123456 v gs , gate-source voltage(v) i d , drain current(a) v ds =5v single pulse power rating, junction to ambient (note on page 2) 0 100 200 300 400 500 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =150c t a =25c ja =125c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =125c/w
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 7/9 MTD55N10Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 8/9 MTD55N10Q8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c898q8 issued date : 2013.04.19 revised date : 2014.03.31 page no. : 9/9 MTD55N10Q8 cystek product specification sop-8 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1850 0.2007 4.70 5.10 i 0.0031 0.0110 0.08 0.28 b 0.1457 0.1614 3.70 4.10 j 0.0157 0.0323 0.40 0.83 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0102 0.19 0.26 d 0.0500* 1.27* l 0.0145 0.0204 0.37 0.52 e 0.0130 0.0201 0.33 0.51 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0472 0.0638 1.20 1.62 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: 8-lead sop-8 plastic package cystek packa g e code: q8 top view a b front view f c d e g i part a h j k o m l n right side view part a date code d55 device name n 10
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